The present invention is related to a multi-mode digital-to-analog converter (DAC) and more particularly to a multi-mode DAC with selectable output range, granularity (or resolution) and offset and controlled slew rate.
Digital-to-analog converters are used in many electronic circuits to provide adjustable analog reference signals (voltage and current). The analog output signal may be set to different levels by changing the value of a digital control word at the control input to the DAC. For example, many power supply circuits rely on an analog reference signal to set the output voltage or current from the power supply. Adjustable power supplies may therefore need a DAC to generate an adjustable reference signal. As the digital control word at the input of the DAC is changed, the analog reference signal to the power supply is changed and the output voltage or current from the power supply follows the changes in the analog reference signal from the DAC.
Digital-to-analog converters are typically designed with a fixed granularity (resolution or step-size), output range and bias value or offset. Each sequential step in the digital control word increases or decreases the analog output by a fixed amount, which is also known as step-size of least-significant bit (LSB). For example, given a DAC with a fixed output range of 5 volts and a 3-bit digital control word with a range of 0-7 where an input of 0 selects an output of 0V and an input of 5 selects an output of 5V, the analog output may be changed in increments of 1/7 of the 5 volt maximum, or about 0.7 volts. Based on the requirements of the power supply, the granularity and output range may fixed at different values, and is not necessarily limited to an even division of the fixed output range by the number of possible input values according to the width or number of bits in the digital control word. For example, an application may specify that the output granularity is to be in steps of 0.1V with a range of 5V, which would leave a number of unused values in a 6-bit digital control word. The DAC may also be designed to provide a fixed offset or bias in the analog output. For example, given a digital input of 0, the DAC may be configured to generate a non-zero analog output such as 2.5 volts as the fixed lower limit.
For complex electronic systems requiring multiple different reference signals, such as a notebook computer requiring power supplies with several different individually adjustable voltage levels to power various subsystems, multiple conventional DACs are needed to provide the different reference signals. This is particularly true when the various subsystems or operational modes have different requirements for the granularity, output range and offset of the DAC.
The use of a conventional DAC to provide an analog reference signal can also cause noise or other problems due to the rapid slew rate, particularly if large changes are made to the digital control word causing the analog output to respond to the rapid and drastic changes its reference signal goes through. This problem is typically addressed using a buffer amplifier at the output of the DAC to drive a capacitor. This slows changes in the analog reference signal due to the time constant of the system, including the capacitor value. If the DAC and buffer amplifier are embodied in an integrated circuit, the capacitor is typically an external capacitor, requiring a dedicated pin on the integrated circuit to connect the capacitor. The capacitor must be changed from application to application based on the desired slew rate. Furthermore, even with an external capacitor, the slew rate cannot be precisely controlled because the current of the buffer amplifier that charges and discharges the capacitor is process, supply voltage and temperature dependent. Furthermore, if multiple DACs of such type are embodied in one integrated circuit, multiple external pins are needed to connect external capacitances resulting in a higher pin-count and thereby higher cost, not to mention the additional capacitances themselves increasing the overall component count of the electronic system.
Thus, for at least the aforementioned reason, there exists a need in the art for a DAC with selectable output range, granularity and offset and controlled slew rate of its output voltage during transition. Additionally, slew-rate for multiple DACs in one IC should be controlled by the user with one external pin.